A derating analysis produces a table with one row per part and one verdict per row, and on a real board that table is thousands of rows long. Four things get read out of it, and only the first is what most people ask for.
1. The violations, by kind
Not by size. A violation's size is nearly meaningless: 0.52 against a 0.50 ceiling and 0.75 against the same ceiling are both violations, and the second is not "1.4 times worse" in any sense the failure rate recognises, because the stress factor is nonlinear. What matters is which axis was breached and therefore which fix applies.
| Kind | Reading |
|---|---|
| Over on a stress ratio | A part-selection or circuit finding. Cheap before layout freeze, expensive after |
| Over on temperature | A thermal finding. It may not be fixable by changing the part at all |
| Over on both | Usually a part in the wrong place: right rating, wrong neighbourhood |
| Over on a stress the family rule treats specially | Contact load type, tantalum circuit impedance, SOA. Read the rule, not the ratio |
2. The margin distribution, not just the failures
The useful output is the histogram of headroom across the board. A design where most parts sit near their ceiling has no violations today and will have several after the first load increase; a design with a long tail of very lightly loaded parts is carrying weight and cost it does not need.
| Pattern | What it says |
|---|---|
| A cluster just inside the ceiling | Fragile. Any change to load, ambient or tolerance produces violations |
| A wide spread with a few outliers | Healthy: the outliers are the design's real decisions |
| Everything far inside | Over-specified. Worth asking what the parts cost in mass and money |
The worked example has both: three violations and two passing parts with under a tenth of headroom, and the second pair is the one that will produce next year's findings.
3. The two factors, back into the prediction
Every operating point the analysis established is an input the prediction needs: the stress ratio through the family's stress factor, and the part temperature through the Arrhenius factor. Running the prediction on nominal stresses and nominal ambients while the derating report holds worst-case numbers produces two documents that disagree, and the disagreement usually goes unnoticed because nobody compares them.
One operating point per part, used by both. That is the whole integration requirement, and it is why the two analyses belong on the same parts list.
4. The waivers, as a register
A waived violation is not a closed one. It is a part knowingly operated outside policy, and three things belong with it: the mechanism that the overstress makes credible, the evidence that it is tolerable, and the named authority who accepted it. The mechanism goes into the FMECA as a mode, because a capacitor at 0.75 of rated voltage has a different mode mix from one at 0.50, and a report that waives without recording the mode has moved the risk somewhere nobody will look for it.
What the analysis does not tell you
- Nothing about transients. Inrush, fault current, hot-plug, single-event effects and lightning are separate limits with separate analyses. A part inside its steady-state derating can still be destroyed on the first power-up.
- Nothing about wear-out. Electrolytics dry, connectors fret, solder cycles. Derating slows those clocks; it does not stop them, and a life-limited part still needs a life limit.
- Nothing about whether the temperature is right. The analysis is exactly as good as the thermal model behind it. A derating report over a thermal model that was never correlated to a test is a well-formatted assumption.
- Nothing about the parts nobody listed. Coverage is checkable against the BOM and should be checked: the part that is missing from the derating table is usually the one somebody added late, which is also the one that was never thermally analysed.